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The connective task has two main areas of work, TSV and flip chip bonding development. Flip chip bonding at STFC RAL STFC/RAL are developing a fine pitched Indium...
FEI 4 Documentation Documentation for FEI can be found at https://espace.cern.ch/atlas pixel upgrade elec/Final%20Design/Reference/ (NB: Requires cern id and...
Flip chip bonding at STFC RAL STFC/RAL are developing a fine pitched Indium flip chip process. The samples first have an under bump metal (UBM) layer deposited upon...
Indium Bumped Modules This page will serve as a database for characterisation of Indium Bumped Modules developed at RAL. Indium bumps require pressure only to make...
Pixel Weekly vidyo/phone meetings Thursdays at 10:00 am (UK time) portal or Vidyo portal In general, indico pages are listed in: https://indico.cern.ch/categoryDisplay...
Characterisation of Single Devices in Glasgow University and the UK Assembly Details SCCvFEI4B Some notes on assembly, including wirebond program, are given here...
Wafer Probing Info Notes The following modifications should be made to the Probe Card (FE I4A only) Add solder jumper to right side of T1 Add solder jumper...
Welcome to the 1 web Available Information This Twiki page is intended for gathering all information on the ATLAS upgrade pixel work. Sharepoints: WP1 (Pixel...
Number of topics: 8

 
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