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Wafer and sensor numbering scheme |
| | A set of lines with decreasing line width and spacing were put on the mask to assess the resolution of the process. Starting with 10 lines of 5 um line width and spacing, increasing with 5 um for each set of lines. As seen in the overview picture all lines down to 10 um line width and spacing were correctly reproduced. However, the smallest pitch region became merged into one solid metallisation as can be seen in the close-up.
IV and CV measurments |
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> | Measurements performed by Alex Chilingarov, University of Lancaster and analysis is done by Lars Eklund, University of Glasgow. |
| | Summary plots of I/V and C/V performance for wafer 09 (12 µm BCB)
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| | Depletion voltage extracted from C/V
The depletion voltage was extracted by fitting a linear function to the 1/C2 vs. Vbias graph between 200 and 400 V. The depletion voltage is defines as the point where the graph deviates more than 3% from that straight line. The depletion voltage is displayed both as a histogram and as a map where the depletion voltage is displayed in its position on the wafer, with coordinates as defined in the figure above. |
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| META FILEATTACHMENT |
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| META FILEATTACHMENT |
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| META FILEATTACHMENT |
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