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DetDev Web>ATLASStripUpgrade>WireBonding>AsicsLog>NewASICSWireBondSpacingTrials (2012-07-02, FredDoherty)
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DetDev Web>ATLASStripUpgrade>WireBonding>AsicsLog>NewASICSWireBondSpacingTrials (2012-07-02, FredDoherty) EditAttach -- FredDoherty - 2012-06-29
To achieve correct measurements as above (assuming samples are exactly the size designed)
Silicon (with DC) and 200um long AISC pad samples should be: 
To achieve correct measurements as above (assuming samples are exactly the size designed)
Silicon (with DC) and 200um long AISC pad samples should be: 
Wire Bonding Trials
To achieve correct measurements as above (assuming samples are exactly the size designed)
Silicon (with DC) and 200um long AISC pad samples should be: - aligned in x
- seperated (edge to edge) by 2812um or seperated from bondpad edge to bondpad edge by 3823um
To achieve correct measurements as above (assuming samples are exactly the size designed)
Silicon (with DC) and 200um long AISC pad samples should be: - seperated (edge to edge) in xb y 335um
- seperated (edge to edge) in y by 1742um or sepereated from bond edge to bond edge by ????um
| I | Attachment | History | Action | Size | Date | Who | Comment |
|---|---|---|---|---|---|---|---|
 pdf |
ABtalk.pdf | r1 | manage | 1646.2 K | 2012-07-02 - 09:45 | FredDoherty | Wire Bonding Trials for 130nm ASICs |
Edit | Attach | Topic revision: r2 - 2012-07-02 - FredDoherty
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