Difference: WaferTesting (4 vs. 5)

Revision 52011-11-01 - AndrewBlue

Line: 1 to 1

META TOPICPARENT	name="ATLASStripUpgrade"

Descriprtion of the water testing of ASICS at Glasgow

Introduction

Changed:

<
< The following is a decripton of the setup used to test wafers of ABCn ASICS at Glasgow.

>
> The following is a description of the setup used to test wafers of ABCn ASICS at Glasgow.

Changed:

<
< The setup uses a Cascade semi automaitc propbe station, with a cutosm built probe card. The probe card is connected to a PCB driver card, which sends signals and data to and from the PC. 2 NI cards are used for signalling, voltage sourced for power, multimeters for measuring the DACs and an adapted verstion of SCTDAQ is used for control software

>
> The setup uses a Cascade semi automatic probe station, with a custom built probe card. The probe card is connected to a PCB driver card, which sends signals and data to and from the PC. 2 NI cards are used for signalling, voltage sourced for power, multimeters for measuring the DACs and an adapted verstion of SCTDAQ is used for control software

Added:

>
> %IMAGE{"http://img811.imageshack.us/img811/3444/tsx1820.jpg"}%

Hardware

Changed:

<
<

TTi TSX3510P	TTi CPX 2000	Agilent 34401A	Agilent 34401A

2.5V for ABCn

>
>

TTi TSX	TTi CPX 2000	Agilent 34401A	Agilent 34401A

2.5V for ABCn

5.5V for Driver board

Line: 37 to 38

- To 2nd multimeter

Probe Card

Changed:

<
<

>
>

The custom cantilever epoxy probe card, made by Rucker and Kolls, Milpitas, CA, has 122 probes.

In place of the usual edge connector, 0.1” header pins are used to provide connectivity, a deliberate choice to give added clearance
above the wafer surface during probing.

The card has also been shortened to minimize the trace lengths and all LVDS pairs are terminated with 100 ohm resistors at the probe ring.

Probe Station

Changed:

<
<

>
>

Cascade Microtech model S300 probe station
The machine, which has a 12” chuck, can accommodate the 8” ABCN-25 wafers.

NI Cards

Changed:

<
<

Source & Multitmeters

>
>

Commercial off the shelf (COTS) hardware from National
struments (NI) is used to read out each ASIC

Fast test vectors are generated by the NI PCI-6562 400 Mb/s Digital Waveform Generator/Analyzer, which has 16 LVDS

Software

Changed:

<
<

>
>

Root 5,26
Visual Studio Express 2008
Labview 8.6
SCTDAQ

Added:

>
>

Test Sequence

Digital Test Vectors

Four test vector blocks are used to test the complete digital functionality of the chip

Bearing in mind that ABCN-25 has built-in shun regulator functionality to be used as part of a serially powered
system, each test is performed under different powering conditions such that the basic functionality of each of theshunt blocks may be demonstrated.

For a chip to be considered good, it must return no errors for any vector block.

In addition, for tests executed with serial powering shunts active, the full source current must be drawn at the expected
voltage.

DAC Characterisation

The ABCN-25 design includes an on-chip multiplexer which enables each of a number of internal analogue signals to be routed to an external voltmeter.

These nodes include the output of each of the chip’s Digital to Analogue Converters (DACs).

Changed:

<
< Test Sequence

>
> During the wafer probing, a digital voltmeter is used to record 8 points to characterise each DAC, and a single measurement for each static node available through the
multiplexer.

Changed:

<
<

Digital Test Vectors
- Check all registres can be written and sent back
- Test token receive and send data
- Same for other side of chip
- Master mode with 80MHz clock
- Stops at failure and flasgs as Bad (Red)
Analogue DACs via the multiplexer output
Analogue front end test
- 2 point gain (1.5, 2 & 2.5 fC trim DACS @ 0)
- Threshold scan at full range of trim DACS (2fC, trimDAC :@ max)

>
>

Additional measurements are made of the bandgap reference made available at the vbgtest pin and of the analogue voltage derived from the digital supply by the chip’s
built in regulator.

Chips having DACs with anomalous single point measurements or DAC step sizes are considered as rejects.

Analogue Characterisation

Each ABCN-25 readout channel has a 5-bit threshold DAC, used to compensate for offset variations across the chip.

In addition the step size of these DACs , known as the trim range, may be set to one of 8 possible levels.

All wafer probing data is recorded using trim range 4.

With all trim DACs set to zero, threshold scans are made for charges of 1.5fC, 2.0fC and 2.5fC, injected using the ABCN-25’s
internal calibration circuitry.

A fourth threshold scan is then made for an injected charge of 2.0fC, but this time the trim DACs are set to 31.

This data may be analysed to calculate the gain, offset and noise of each channel and to estimate the number of channels which may be trimmed using the selected
trim range.

For a chip to be considered as good, it must have no more than one bad (dead, stuck or untrimmable) channel.

Instructions

Added:

>
>

In root, .x Wafter.cpp
Loads STGUI.cpp

Test Bonded ASIC Test Die

Line: 99 to 139

Analog (Yellow)

If 3 Digital fails in a row, wafer testing will fail

Added:

>
>

View topic | History: r7 < r6 < r5 < r4 | More topic actions...