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AndrewBlue - 2012-02-20
Hybrid Bonding Diagrams
https://twiki.cern.ch/twiki/pub/Atlas/ModuleAssembling4ATLASSCTUpgrade/Stave_Hybrid_WireBonding.pdf
Shunts
The current drawn by the readout ASICs depends on their operational mode. The constant current
supply is set to the maximum expected hybrid current and shunt regulation is used to keep the
voltage across the hybrid constant. The latest generation of prototype readout ASIC is made in the
IBM 250nm process and termed ABCN-25 Already, this ASIC contains custom circuitry for
the implementation of shunt regulation.
There are two shunt regulation options within the ABCN-25, termed M-shunt and W-shunt.
The M-shunt option uses two shunt transistors in each ASIC, controlled by a voltage from an
external circuit.
The W-shunt option uses both shunt and control circuitry within the ASIC itself.
Shunt regulation may also be implemented outside the readout ASIC, using discrete compo-
nents or an additional ASIC.
BCC information
Pinout
# | Name | I/O | Description |
1 | DATA0_M | In | Data input from ABCN (Column 0, Bottom) |
2 | DATA0_P | In |
3 | ABCN_RESETB_M | Out | RESETBsignal to ABCNs |
4 | ABCN_RESETB_P | Out |
5 | ABCN_L1_M | Out | L1 signal to ABCNs |
6 | ABCN_L1_P | Out |
7 | VDD |
|
|
8 | GND |
|
|
9 | ABCN_COM_M | Out | COM signal to ABCNs |
10 | ABCN_COM_P | Out |
11 | ABCN_DCLK_M | Out | ABCN Data Clock |
12 | ABCN_DCLK_P | Out |
13 | ABCN_BCO_M | Out | ABCN Bunch Clock |
14 | ABCN_BCO_P | Out |
15 | ABCN_MODE80 | Out | ABCN MODE80 |
16 | DATA2_M | In | Data input from ABCN (Column 1, Bottom) |
17 | DATA2_P | In |
18 | DATA3_M | In | Data input from ABCN (Column 1, Top) |
19 | DATA3_P | In |
20 | DATAOUT_M | Out | Multiplexed data sent to DAQ |
21 | DATAOUT_P | Out |
22 | ID0 | In | BCC ID bit 0 set (internally pulled-up) |
23 | ID1 | In | BCC ID bit 1 set (internally pulled-up) |
24 | ID2 | In | BCC ID bit 2 set (internally pulled-up) |
25 | ID3 | In | BCC ID bit 3 set (internally pulled-up) |
26 | ID4 | In | BCC ID bit 4 set (internally pulled-up) |
27 | ID5 | In | BCC ID bit 5 set (internally pulled-up) |
28 | VDD |
|
|
29 | GND |
|
|
30 | CM_TP | Out | Clock Multiplier Test Point |
31 | COM_FB_M | In | COM Feedback |
32 | COM_FB_P | In |
33 | COM_M | In | DAQ Command line |
34 | COM_P | In |
35 | L1R_FB_M | In | L1R feedback |
36 | L1R_FB_P | In |
37 | L1R_M | In | DAQ Combined Level-1/Reset signalling |
38 | L1R_P | In |
39 | BCO_M | In | Bunch Clock |
40 | BCO_P | In |
41 | DATA1_M | In | Data input from ABCN (Column 0, Top) |