Wafer and sensor numbering scheme

The wafers are marked with sensor number at the wafer edge close to the larger straight section of the border. The individual sensors are labelled by their X and Y positions on the wafer. The classification of the wafers and the definition of the wafer number can be found in SensorNumbering.pdf.

Photos at reception of Run 1 wafers

The photos were taken at reception of the wafers, but after wafers w09 and w14 had some of their ground planes bonded to the bias rails. Bond tests and tuning were done on the large metallised area at the bottom of w09. The bonds are visible in the photos. The bias bond locations are described in BiasBonds.pdf.

Full wafer views

Close-up views on a few sensors on w14

Meshed GND plane, full view

Bias bond, close-up

Meshed GND plane, top half

Meshed GND plane, full view

Solid GND plane, top half

Triangular GND plane, full view

Close-up views on a few features on w14

Ground planes: solid, meshed, meshed (bond pad)

Bias and guard ring connections: bias and guard rings, bias ring via, bias bond (triangular), bias bond (meshed)

Strip connections: overview, zoom 1, zoom 2, zoom 3, bond pad, double vias

Bias resistor connections: resistor via, zoom

A set of lines with decreasing line width and spacing were put on the mask to assess the resolution of the process. Starting with 10 lines of 5 um line width and spacing, increasing with 5 um for each set of lines. As seen in the overview picture all lines down to 10 um line width and spacing were correctly reproduced. However, the smallest pitch region became merged into one solid metallisation as can be seen in the close-up.

IV and CV measurments

Summary plots of I/V and C/V performance for wafer 09 (12 µm BCB)

Depletion voltage extracted from C/V

The depletion voltage was extracted by fitting a linear function to the 1/C2 vs. Vbias graph between 200 and 400 V. The depletion voltage is defines as the point where the graph deviates more than 3% from that straight line. The depletion voltage is displayed both as a histogram and as a map where the depletion voltage is displayed in its position on the wafer, with coordinates as defined in the figure above.

-- LarsEklund - 21 Nov 2008